1. Field of Invention
The present invention relates to an analog circuit, and, more particularly, to a current bias circuit and a current bias start-up circuit thereof.
2. Description of Related Art
Generally speaking, a current mirror serves as a bias circuit in an analog circuit. A start-up circuit is needed by this kind of bias circuit to ensure the proper operation of the circuit.
FIG. 1 is a diagram of a conventional bias circuit. Referring to FIG. 1, the conventional bias circuit includes a current bias circuit 10 and a bias start-up circuit 11 wherein the current bias circuit 10 includes P-type transistors MP 101 and MP102, N-type transistors MN101, MN102, MN103, and MN104, diodes D101, D102, and D103. The bias start-up circuit 11 includes diodes D111, D112, and a resistor R111.
During activation, the bias start-up circuit 11 supplies the current IPU passing through the diodes D111 and D112 to the current mirror formed of the N-type transistors MN103 and MN104 in the current bias circuit 10 to turn on the bias circuit. The resistor R111 is used for limiting the current IPU.
Generally speaking, there is a working range, e.g. from 7V to 15V, for the power supply voltage of an integrated circuit. Referring to the bias start-up circuit 11 in FIG. 1, the start-up circuit works with lower current when the power supply voltage is working at 7V. When the power supply voltage is working at 15V, the working current of the start-up circuit may increase 2 times, which results in power consumption in the integrated circuit.
FIG. 2 is a diagram of another conventional bias circuit. Referring to FIG. 2, the bias circuit includes a current bias circuit 20 and a bias start-up circuit 21 wherein the current bias circuit 20 includes P-type transistors MP201 and MP202, N-type transistors MN201, MN202, MN203, and MN204, diodes D201, D202, and D203. The bias start-up circuit 21 includes an inverter INV21 and an N-type transistor MN211. The inverter INV21 comprises a P-type transistor MP212 and an N-type transistor MN213.
During activation, the input voltage level of the input terminal of the inverter INV 21, the gates of the P-type transistor MP212 and the N-type transistor MN213, is at low voltage level, so that the output terminal of the inverter INV21, which is the nodes where the sources/drains of the P-type transistor MP212 and the N-type transistor MN213 are coupled to each other, outputs high voltage level to the gate of the N-type transistor MN211 to turn on the N-type transistor MN211. Since the N-type transistor is turned on, the voltage level at the node where the gates of the P-type transistors MP201 and MP202 are coupled is pulled down. The P-type transistors MP201 and MP202 are turned on forcedly to activate the bias circuit.
Upon completion of activation, the input terminal of the inverter INV21 receives high voltage level so that the node where the sources/drains of the P-type transistor MP212 and the N-type transistor MN213 are coupled, outputs low voltage level to the gate of the N-type transistor MN211. Additionally, the gate of the N-type transistor MN211 is turned off. The advantage of the bias start-up circuit is that no additional power consumption upon completion of activation.
However, the circuit discussed above does not provide much solution for leakage current. Generally speaking, an integrated circuit produces leakage current when it is illuminated. The circuit in FIG. 2 cannot be turned off when the PN Junction formed of the N-type transistors MN201 and MN203 produces leakage current.